Struct SYN_ShiftRegIn

ClassList > SYN_ShiftRegIn

Input Shift Register Context.

• #include <syn_shiftreg.h>

Public Attributes

Type	Name
uint8_t	buffer
SYN_GPIO_Pin	clock_pin
SYN_GPIO_Pin	data_pin
SYN_GPIO_Pin	load_pin
bool	msb_first
uint8_t	num_chips

Public Attributes Documentation

variable buffer

uint8_t SYN_ShiftRegIn::buffer[SYN_SHIFTREG_MAX_CHIPS];

Sampled input state buffer bytes

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variable clock_pin

SYN_GPIO_Pin SYN_ShiftRegIn::clock_pin;

Shift Clock pin (CLK)

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variable data_pin

SYN_GPIO_Pin SYN_ShiftRegIn::data_pin;

Serial Data In pin (Q7 / SO)

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variable load_pin

SYN_GPIO_Pin SYN_ShiftRegIn::load_pin;

Parallel Load pin (PL / LD)

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variable msb_first

bool SYN_ShiftRegIn::msb_first;

True if shifting MSB first

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variable num_chips

uint8_t SYN_ShiftRegIn::num_chips;

Number of cascaded 8-bit chips (1 to 8)

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The documentation for this class was generated from the following file src/syntropic/drivers/syn_shiftreg.h